Thematic Center for Quantum Computer

Introduction

A universal quantum computer promises a sustainable ecosystem, fostering advancements in artificial intelligence, drug discovery, exotic materials, and beyond. Enhancing qubit gate fidelity stands as the linchpin for realizing such a quantum computer, particularly for noisy intermediate-scale quantum applications and as a pivotal step towards error-corrected quantum systems. The architecture of two-qubit coupling assumes a central role, facilitating single-qubit operations and the creation of two-qubit entanglement. Improving two-qubit gate fidelity and minimizing crosstalk are essential for scaling up qubits towards fault-tolerant quantum computers. Our endeavor is to develop a high-performance superconducting quantum computer with exceptional two-qubit fidelity. To achieve this, we propose three tasks: standardizing the fabrication process, optimizing device design, and implementing efficient operation schemes.

We will adopt a frequency-tunable coupler to leverage high coupling strength and nullify direct coupling between qubits, resulting in high on-off-contrast interqubit coupling—an imperative for swift and precise two-qubit gates. To expedite qubit reset times, we will explore active qubit reset schemes utilizing fast FPGA architecture for pulse-level feedback. Various gate optimization and autocalibration schemes will be devised and implemented for high performance multiqubit systems. These endeavors pave the way for establishing the foundation of a scalable superconducting quantum computer.
 

Laboratory contact number:02-2789-8372

Executive Officer
Chii-Dong Chen chiidong@as.edu.tw

Major Milestones of the Project

  1. Succeeded in delivering Academia Sinica’s in-house developed 5Q superconducting quantum computer with an average T1 of 28 us.
  2. Single qubit fidelity achieves 99.7%, enabling the implementation of 2Q SWAP and CZ gates, as well as CZ gate operations in 5Q system.
  3. Achieved characterization of 3Q GHZ state, and demonstrated 4Q and 5Q entanglement states.
  4. Academia Sinica’s in-house 5Q system is now online on the cloud platform for demonstration.
     

Pictures of research results

Device Fabrication:Superconducting qubit device independently fabricated in the clean room of the Institute of Physics, Academia Sinica (SEM images are shown above).

Device Fabrication:Superconducting qubit device independently fabricated in the clean room of the Institute of Physics, Academia Sinica (SEM images are shown above).

Measurement System: The center image displays our in-house fabricated five superconducting qubits chip. The right image indicates the cryogenic dilution refrigerator system for superconducting quantum computers, with the chips positioned on the 10 mK plate. The left image envisions various components such as attenuators, IR filters, traveling-wave parametric amplifiers (TWPA), and low-noise amplifiers (HEMT), strategically installed along readout/control lines for various purposes.

Measurement System: The center image displays our in-house fabricated five superconducting qubits chip. The right image indicates the cryogenic dilution refrigerator system for superconducting quantum computers, with the chips positioned on the 10 mK plate. The left image envisions various components such as attenuators, IR filters, traveling-wave parametric amplifiers (TWPA), and low-noise amplifiers (HEMT), strategically installed along readout/control lines for various purposes.

Single readout pulse technique: The single readout pulse technique is utilized for qubit readout, allowing the incorporation of a TWPA into readout routings to enhance signal-to-noise ratio (SNR) and can be mapped on the I-Q plane, as depicted in Fig. (a). The comparison between TWPA-on and -off are shown in Fig. (b), where the SNR of the TWPA-on case is better than that of the TWPA-off case.

Single readout pulse technique: The single readout pulse technique is utilized for qubit readout, allowing the incorporation of a TWPA into readout routings to enhance signal-to-noise ratio (SNR) and can be mapped on the I-Q plane, as depicted in Fig. (a). The comparison between TWPA-on and -off are shown in Fig. (b), where the SNR of the TWPA-on case is better than that of the TWPA-off case.

Qubit coherence times: The following figure illustrates the coherence time (T1 and T2) of a superconducting qubit, along with the statistics for T1. Wigner tomography measurement can be used to identify the reconstructed quantum states such as |0> + i|1>, |1>, and |0> - i|1>.

Qubit coherence times: The following figure illustrates the coherence time (T1 and T2) of a superconducting qubit, along with the statistics for T1. Wigner tomography measurement can be used to identify the reconstructed quantum states such as |0> + i|1>, |1>, and |0> - i|1>.

Randomized benchmarking of single-qubit gates: Gate fidelity indicates the performance of a quantum computer. Randomized benchmarking (RB) is an experimental procedure to demonstrate the control of quantum systems and extract the fidelity (as shown in the Figure above). The average error of Academia Sinica in-house fabricated qubit is 0.26 %, resulting in an average single-qubit error of 0.14 %.

Randomized benchmarking of single-qubit gates: Gate fidelity indicates the performance of a quantum computer. Randomized benchmarking (RB) is an experimental procedure to demonstrate the control of quantum systems and extract the fidelity (as shown in the Figure above). The average error of Academia Sinica in-house fabricated qubit is 0.26 %, resulting in an average single-qubit error of 0.14 %.

State swap between two coupled qubits: Two-qubit gates are the foundation of a universal quantum computer. The diagram below illustrates the state exchange measured between Q1 and Q2.

State swap between two coupled qubits: Two-qubit gates are the foundation of a universal quantum computer. The diagram below illustrates the state exchange measured between Q1 and Q2.

Two-qubit gate measurement (CZ gate): One of the pulse schemes for implementing the CZ gate is utilizing the Rabi oscillation between |11> and |02> (or |20>) of two coupled qubits (Q1 and Q2). As shown in Figure below the |11> to |02> Rabi is turned on by bringing Q1/Q2 from its idle flux point (indicated by the blue solid line) to the CZ operation flux point (ω11=ω02) indicated by the red dashed line. An extra π phase of |11> is gained after |11> experiences a full cycle of the |11> to |02> Rabi oscillation. The corresponding pulse scheme is shown in the Figure, where Q1 and Q2 are initially prepared in the |11> by applying π pulses, after which Q1 is flux biased such that ω11=ω02. The measured |11> to |02> Rabi oscillation is shown in the Figure. The CZ gate is the most critical and challenging part, as crosstalk significantly affects its fidelity, and of course, too short T2 times can also cause significant troubles. 

Two-qubit gate measurement (CZ gate): One of the pulse schemes for implementing the CZ gate is utilizing the Rabi oscillation between |11> and |02> (or |20>) of two coupled qubits (Q1 and Q2). As shown in Figure below the |11> to |02> Rabi is turned on by bringing Q1/Q2 from its idle flux point (indicated by the blue solid line) to the CZ operation flux point (ω11=ω02) indicated by the red dashed line. An extra π phase of |11> is gained after |11> experiences a full cycle of the |11> to |02> Rabi oscillation. The corresponding pulse scheme is shown in the Figure, where Q1 and Q2 are initially prepared in the |11> by applying π pulses, after which Q1 is flux biased such that ω11=ω02. The measured |11> to |02> Rabi oscillation is shown in the Figure. The CZ gate is the most critical and challenging part, as crosstalk significantly affects its fidelity, and of course, too short T2 times can also cause significant troubles. 

Creating Bell states using CNOT gates: The CNOT gate can actually be constructed using two Hadamard gates sandwiching a CZ gate. This CNOT gate propagates a qubit in an entangled state to the next qubit, forming the basic operation where both qubits are in an entangled state. As shown in the Figure below, with good CNOT or CZ gates, it is easy to achieve entanglement between two qubits. As shown in the lower Figure, if both qubits are initially in the |0⟩ state, using a Hadamard gate first brings the first qubit q0 into a superposition state, then using a CNOT gate entangles q1 with q0, forming the purest Bell state, which is |00⟩+|11⟩ state. In the fragmentation diagram, you can see that |00⟩ and |11⟩ have the highest real part probability (blue bars).

Creating Bell states using CNOT gates: The CNOT gate can actually be constructed using two Hadamard gates sandwiching a CZ gate. This CNOT gate propagates a qubit in an entangled state to the next qubit, forming the basic operation where both qubits are in an entangled state. As shown in the Figure below, with good CNOT or CZ gates, it is easy to achieve entanglement between two qubits. As shown in the lower Figure, if both qubits are initially in the |0⟩ state, using a Hadamard gate first brings the first qubit q0 into a superposition state, then using a CNOT gate entangles q1 with q0, forming the purest Bell state, which is |00⟩+|11⟩ state. In the fragmentation diagram, you can see that |00⟩ and |11⟩ have the highest real part probability (blue bars).

Operations on a one-dimensional five-qubit system: The lower Figure shows frequency distribution of each qubit on the five-qubit chip and the frequency setting during operations. Firstly, it is necessary to measure the highest frequency of each qubit (the sweet spot, marked with thick green dashed lines). Based on the distribution of these frequencies, we calculate the idle frequency of each qubit (marked with thick blue solid lines) and the CZ operation frequency between adjacent qubits (represented by double-arrow lines with different colors indicating different pairs).

Operations on a one-dimensional five-qubit system: The lower Figure shows frequency distribution of each qubit on the five-qubit chip and the frequency setting during operations. Firstly, it is necessary to measure the highest frequency of each qubit (the sweet spot, marked with thick green dashed lines). Based on the distribution of these frequencies, we calculate the idle frequency of each qubit (marked with thick blue solid lines) and the CZ operation frequency between adjacent qubits (represented by double-arrow lines with different colors indicating different pairs).

GHZ state of three qubits: Following the q0-q1 Bell state, by using another CNOT gate to entangle q1-q2, the GHZ state of three qubits can be completed. If the three qubits are perfectly entangled, the GHZ state is |000⟩+ |111⟩, where in the tomography, |000⟩ and |111⟩ have the highest real part probability (blue bars).

GHZ state of three qubits: Following the q0-q1 Bell state, by using another CNOT gate to entangle q1-q2, the GHZ state of three qubits can be completed. If the three qubits are perfectly entangled, the GHZ state is |000⟩+ |111⟩, where in the tomography, |000⟩ and |111⟩ have the highest real part probability (blue bars).

Entanglement of multiple qubits: Continuing to use CNOT gates (replaced by CZ gates and Hadamard gates before and after in this case), entanglement can be expanded to involve more and more qubits. Eventually, it is possible to entangle all five qubits, as shown in the diagram below.

Entanglement of multiple qubits: Continuing to use CNOT gates (replaced by CZ gates and Hadamard gates before and after in this case), entanglement can be expanded to involve more and more qubits. Eventually, it is possible to entangle all five qubits, as shown in the diagram below.

User Interface: For ease of operation, as shown in the diagram above, we have created a user interface that can connect to the cloud. In the top-left corner of this page, we provide single-qubit and two-qubit logic gates for users. Users can drag these logic gates onto the five-line staff to complete the editing of the quantum program. In the top-right corner, users can select the measurement system or quantum chip to be used, or choose a simulator. They can also input the number of samples to be averaged. The bottom-right corner shows the computation circuit in a script format. Finally, users can simply press the "RUN" button to execute the program. This intuitive interface makes operation very simple.

User Interface: For ease of operation, as shown in the diagram above, we have created a user interface that can connect to the cloud. In the top-left corner of this page, we provide single-qubit and two-qubit logic gates for users. Users can drag these logic gates onto the five-line staff to complete the editing of the quantum program. In the top-right corner, users can select the measurement system or quantum chip to be used, or choose a simulator. They can also input the number of samples to be averaged. The bottom-right corner shows the computation circuit in a script format. Finally, users can simply press the "RUN" button to execute the program. This intuitive interface makes operation very simple.

Planned Architecture of Quantum Computer Systems: The diagram above illustrates the planned complete architecture of the quantum computer. The purple bottom section comprises hardware systems from Academia Sinica, control instruments (such as Quantum Machines, Qblox, or products from companies like Keysight), their firmware, intermediate software, FPGA, etc. The green bottom-right section represents the database. The light blue section in the top-right corner represents external systems, including compilers, automation, error suppression, etc., which may interface with HPC. HPC will also perform simulator tasks and job processing. The top layer consists of the user interface and management programs. External systems will connect via QASM to internal control instruments and control the quantum chip QPU.

Planned Architecture of Quantum Computer Systems: The diagram above illustrates the planned complete architecture of the quantum computer. The purple bottom section comprises hardware systems from Academia Sinica, control instruments (such as Quantum Machines, Qblox, or products from companies like Keysight), their firmware, intermediate software, FPGA, etc. The green bottom-right section represents the database. The light blue section in the top-right corner represents external systems, including compilers, automation, error suppression, etc., which may interface with HPC. HPC will also perform simulator tasks and job processing. The top layer consists of the user interface and management programs. External systems will connect via QASM to internal control instruments and control the quantum chip QPU.

Providing a platform for domestic academia and industry to develop quantum computer peripherals: Although our five-qubit quantum computer is still in the prototype stage, it already serves as a platform for domestic academia and industry to test and develop quantum computer peripherals. This quantum computer, starting from the bottom, includes quantum chips, quantum bit control systems and their firmware software programs, compilers at the upper layer, and the user interface at the top layer. Developing a quantum computer holds significant importance as it provides the best platform for establishing a domestic quantum computer ecosystem. Quantum chips are the core and most critical components of the computer, but superconducting quantum chips have unique process conditions and requirements that cannot be directly transferred using current semiconductor process technology, making it one of the key development projects at the Academia Sinica Southern Campus. The control system for quantum bits is a high-speed digital electronic instrument, serving as the best development and testing platform for domestic IT companies interested in investing in the quantum computer industry. Quantum computers will also interface with high-performance computers, using the control system to calibrate quantum bits while providing a pipeline connection to artificial intelligence to enhance its efficiency. Finally, the entire low-temperature system, including its high-density, high-frequency coaxial lines and sockets, and electromagnetic shielding packaging boxes for quantum chips, all present challenges to the precision electronics industry's technical expertise. Our publication of the 5-qubit quantum computer has garnered attention both domestically and internationally, including coverage by foreign media outlets such as The Quantum Insider  (https://thequantuminsider.com/2024/01/24/taiwans-5-qubit-superconducting-quantum-computer-goes-online-ahead-of-schedule/) and EE times (https://www.eetimes.com/taiwans-5-bit-superconducting-quantum-computer-goes-online/)

Providing a platform for domestic academia and industry to develop quantum computer peripherals: Although our five-qubit quantum computer is still in the prototype stage, it already serves as a platform for domestic academia and industry to test and develop quantum computer peripherals. This quantum computer, starting from the bottom, includes quantum chips, quantum bit control systems and their firmware software programs, compilers at the upper layer, and the user interface at the top layer. Developing a quantum computer holds significant importance as it provides the best platform for establishing a domestic quantum computer ecosystem. Quantum chips are the core and most critical components of the computer, but superconducting quantum chips have unique process conditions and requirements that cannot be directly transferred using current semiconductor process technology, making it one of the key development projects at the Academia Sinica Southern Campus. The control system for quantum bits is a high-speed digital electronic instrument, serving as the best development and testing platform for domestic IT companies interested in investing in the quantum computer industry. Quantum computers will also interface with high-performance computers, using the control system to calibrate quantum bits while providing a pipeline connection to artificial intelligence to enhance its efficiency. Finally, the entire low-temperature system, including its high-density, high-frequency coaxial lines and sockets, and electromagnetic shielding packaging boxes for quantum chips, all present challenges to the precision electronics industry's technical expertise. Our publication of the 5-qubit quantum computer has garnered attention both domestically and internationally, including coverage by foreign media outlets such as The Quantum Insider  (https://thequantuminsider.com/2024/01/24/taiwans-5-qubit-superconducting-quantum-computer-goes-online-ahead-of-schedule/) and EE times (https://www.eetimes.com/taiwans-5-bit-superconducting-quantum-computer-goes-online/)

Research results video